Synchronous AM detection has distinct advantages over non-synchronous detection due to improved signal-to-noise performance under poor signal conditions. Modern synchronous AM detectors comprise a combination of integrated circuitry and external components and are more cost effective when the number of external components and of necessary integrated circuit pins are minimized.
Referring to FIG. 1, a standard AM receiver that decodes C-QUAM (Compatible Quadrature Amplitude Modulation) is shown. The receiver shown in FIG. 1 is described in U.S. Pat. Nos. 5,014,316 and 5,151,939 referred to above.
In the standard receiver shown in FIG. 1, an input signal is received at antenna 210, converted to an IF signal in front end circuit 212 and amplified by the IF amplifier 214. AM stereo decoder 256 receives the signal from IF amplifier 214, comprising the signal that was modulated in C-QUAM at the AM stereo broadcaster and which must now be decoded. Envelope detector 216 receives the amplified IF signal and outputs a signal, E, on line 12 comprising 1+L+R, where L represents the left channel signal and R represents the right channel signal of the AM stereo signal.
The amplified IF signal is also input to variable gain amplifier 219, whose gain is controlled by the output of amplifier 217 (explained below). The output of gain circuit 219 is coupled to in-phase detector (IDET) 218 and quadrature phase detector (QDET) 220. QDET 220 acts as the phase detector for phase lock loop 226. The output of QDET 220 is coupled to loop filter 224 in phase locked loop 226, for now bypassing the +1/-1 gain block 320. The output of loop filter 224 is coupled to voltage controlled oscillator (VCO) 222.
IDET 218 and QDET 220 are synchronous detectors and receive in-phase (0.degree. ) and quadrature (90.degree. ) inputs respectively from VCO 222. Lacking in the signal correction, the output signals from IDET 218 and QDET 220 would be (1+L+R)cosine(.theta.) and (L-R)cosine(.theta.), labeled I (synchronously detected in-phase signal) and Q (synchronously detected quadrature-phase signal) on lines 14 and 16 respectively.
The output I of IDET 218 goes through gain block 318, described below, and is coupled to the input of amplifier 217, which amplifies the difference between the output I on line 14 and the output E on line 12 and provides that amplified difference to variable gain amplifier 219. This feedback circuit forces the corrected I output on line 14 to be equal to the E output of 1+L+R on line 12, forcing the gain of gain stage 219 to equal 1/cosine(.theta.). Since the output of variable gain stage 219 is also coupled to QDET 220, this forces the output Q on line 16 to be equal to L-R.
The outputs I and Q of IDET 218 and QDET 220 are input to matrix and audio processing circuitry 233, where base band audio left and right signals are produced. Circuitry 233 is discussed in detail in pending U.S. Pat. No. 5,151,939, referred to above.
Frequency detector 319 and +1/-1 gain blocks 318 and 320 help phase lock loop 226 quickly lock onto AM signals. Frequency detector 319 looks at the output I of IDET 218 at the zero crossings of the output signal Q of (QDET 220. If the output I of IDET 218 is positive at the zero crossings of the signal Q, both of the +1/-1 gain blocks 318, 320 invert the I and Q signals output from IDET 218 and QDET 220. If the signal I is negative with respect to AC ground at the zero crossings of the signal Q, the +1/-1 gain blocks do not invert the I and Q signals output from IDET 218 and QDET 220.
In phase locked loop 226, the resonator for VCO 222 is typically accurate to approximately plus or minus 3 kHz. This forces phase locked loop 226 to lock plus or minus 3 kHz. If phase locked loop 226 has a band width of only 5 Hz, it cannot lock over the desired frequency range of VCO 222.
Frequency detector 319 allows the circuit to lock over the desired frequency range. The frequency detector 319 and gain circuits 318 and 320 are responsive to the I and Q signals. The position of I, when the Q signal goes to zero volts, is used to flip the I and Q signals. This provides a non-zero DC voltage to the loop filter 224 of the phase locked loop 226 and allows the phase lock loop to acquire lock over the whole frequency range of the VCO 222.
The prior art circuit shown in FIG. 1 allows phase lock loop 226 to lock, but the lock times are on the order of seconds when it is preferable to tune the AM band with lock times of less than 100 milliseconds. To increase the lock speed to a time of less than 100 milliseconds, a variable band width phase locked loop is used. Typically, the control for the variable band width phase locked loop uses a relatively long time constant while varying the band width of the filter from broad to narrow to assure acquisition of the incoming AM signal. This long time constant requires use of an external component such as a large capacitor, therefore requiring the addition of a pin to the integrated circuit and an external component to the circuit board, both of which increase the price of the circuitry.
Referring to FIG. 2, the audio processing circuitry shown is described in detail in U.S. Pat. No. 5,151,939, referred to above. The audio processing circuit 233 includes variable corner frequency low pass filters 102 and 103 and variable Q notch filters 106 and 107.
The variable low pass filters 102 and 103 perform two functions. The first function of variable low pass filters 102 and 103 is to supply additional attenuation to the base band edge, which is needed since new radio systems use wider IF filters to improve the fidelity of the AM signal. The second function of variable low pass filters 102 and 103 is to provide control over the amount of 10 kHz band width information seen by notch filter 107 and thus seen by the 10 kHz signal detector comprising high 0 band pass filter 110 and comparator 111. (10 kHz is the United States spacing between AM radio stations. In Europe, the station spacing is 9 kHz. The filter characteristics in AM receivers correspond to the broadcast format of the country in which the radio is to be used. In this document, when the term 10 kHz is used, it is understood that the value 10 kHz corresponds to the United States AM station spacing, and that for applications in countries in which the station spacing is not 10 kHz, the correct station spacing is to be substituted.)
The variable Q notch filter 107 provides a band pass output that is fed to the high Q 10 kHz band pass filter 110. The resultant output from the high Q 10 kHz band pass filter 110 is an isolated 10 kHz signal whose relative strength indicates the presence of an adjacent channel.
The output from high Q 10 kHz band pass filter 110 is provided to the non-inverting input of comparator 111, which produces pulses at its output having a width that vary as a function of the relative amplitude of the output of filter 110 and the value of the reference voltage on the inverting input of comparator 111. The varying pulse width output from comparator 111 is coupled through transistor 120 and resistor 122 to capacitor 126, thereby controlling the voltage CVOL at node 15, which is equal to the voltage across capacitor 126.
The voltage CVOL is used to control the variable low pass filters 102 and 103 and the variable Q notch filters 106 and 107. This closed loop scheme precisely limits the amount of 10 kHz information representing adjacent channel information present in the signal path. When no 10 kHz signal information is detected, the loop widens the response of low pass filters 102 and 103 and notch filters 106 and 107 to allow for maximum fidelity of the desired signal. However, when a strong adjacent channel is detected, the loop narrows the signal path band width to eliminate the interference. This is done at the expense of desired fidelity.
The voltage CVOL is also used to control the variable attenuator 104 and the left minus right signal path which performs the blend-to-mono function. Attenuator 104 is active in the range of CVOL from 3 volts to 1.5 volts. The low pass and notch filters are active in the range of CVOL from 4 volts to 1.5 volts. The different functions are all controlled by the single control voltage CVOL over different ranges of CVOL voltages. Other flags that can pull down CVOL are ACG and excess I, which provide information about the signal quality to control circuits 112 in a manner well known to those skilled in the art.
The scheme provided through control voltage CVOL is fast attack-slow decay. The 10 kHz signal or the signal provided by the control circuits through transistor 128 and resistor 130 can quickly reduce the voltage CVOL. The slow decay time is necessary to avoid any quick fluctuations in and out of audio processing that may irritate the listener. The slow decay function is derived from a large RC time constant requiring a large resistor value for resistor 127 and a large capacitor value for capacitor 126, which is typically an external tantalum capacitor to minimize leakage current. A long time constant is also needed for the phase lock loop to lock on to the signal.
What is desired is a control for the AM stereo decoder circuitry that provides all of the necessary functions with minimum part count and minimum external pin count.